Overview
Power Management Design Architect (PMU/PMIC) Jobs in Noida, Uttar Pradesh, India at Best NanoTech
Title: Power Management Design Architect (PMU/PMIC)
Company: Best NanoTech
Location: Noida, Uttar Pradesh, India
Power Management Design Architect (PMU/PMIC)
Location: Noida, India
Work Mode: Onsite
Experience: 5–15 Year
- Role Overview
We are looking for a Power Management Design Architect to lead the architecture, design, and validation of PMU/PMIC solutions. The role involves end-to-end ownership from concept to silicon validation. The candidate will work on DC-DC converters, LDOs, and key analog building blocks for power-efficient semiconductor systems
- Key Responsibilities
- Define and develop end-to-end PMU/PMIC architecture
- Design DC-DC converters (Buck/Boost) and LDO regulators
- Architect and design key analog blocks such as bandgap reference, error amplifier, and gate drivers
- Develop and optimize control loops, compensation, and stability
- Drive power efficiency, transient response, and low quiescent current performance
- Ensure design robustness across PVT (Process, Voltage, Temperature) variations
- Perform simulations, design verification, and corner analysis
- Lead silicon bring-up, debugging, and characterization activities
- Analyze lab data and correlate with simulation results
- Collaborate with layout, digital, and system teams for design integration
- Mentor junior engineers and provide technical guidance
- Support product-level validation and documentation
- Required Qualification
- M.Tech or PhD in Electronics / Electrical Engineering or related fields
- 5–10 years of experience in Analog / Power IC Design
- Proven track record of successful silicon in PMIC or DC-DC designs
- Strong fundamentals in analog and power electronics design
- Technical Skills (Grouped & Structured)
Power Management
- DesignPMU / PMIC architecture
- designDC-DC converters (Buck /
- Boost)Low Dropout Regulators
(LDOs)
Analog Circuit
- DesignBandgap reference
- designError amplifier
- designGate driver c
- ircuitsCompensation and control loop design
Performance Optimization
- Stability analysis and loop compensation
- Power efficiency optimization
- Transient response
- tuningLow-power / low quiescent current design
Process & Validation
- PVT analysis (Process, Voltage, Temperature)
- Silicon bring-up and lab validation
- Debugging and characterization
Tools & simulation
- Cadence
- Virtuoso
- Spectre MATLAB
Technology
- ExposureCMOS / BCD process technologies
- Good to Have( Optional)
- Experience in automotive or low-power applications
- Exposure to system-level power management
- Knowledge of EMI/EMC considerations in power Design
- Experience working across multiple technology nodes
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